CS-343 Assignment 8
Due May 17th

This assignment covers material from Chapters 5 and 6 of the textbook. Specifically, sections 5.1, 5.2, 5.3, and 6.3

You must submit this assignment by 5:00 pm on the due date to receive credit for it.

Put the answers to the following questions in the body of an email message (no attachments accepted). Use “CS-343 Assignment 8 submission” as the subject line. Be sure your name is in the email so you can receive credit.

1. What are the three parameters that vary along the various levels of the memory hierarchy.
2. If rotational delay were the only factor affecting disk access time, how much faster would a 7200 RPM disk be compared to a 5400 RPM disk?
3. What is the rotational period of a 10,000 RPM disk, in milliseconds?
4. Define the terms track and sector for magnetic disks.
5. Use the web to define areal density in the context of disk drives. Search for the highest areal density of a currently available disk. What is it? Cite the sources for both of your answers to this question.
6. How amazing is the answer to the second part of the previous question?
7. Why doesn’t anyone build a computer with a a terabye of registers in the CPU and just skip the main meory and disk levels of the memory hierarchy all together?
8. A computer has 16 GB of main memory and 1 MB of cache. Once the cache has filled, what is the probability of a cache hit if the processor accesses main memory in a totally random fashion?
9. The previous question specified “once the cache has filled.” Would the probability of a hit be higher or lower than your answer before the cache has filled?
10. For a certain computer, main memory access time is 50 nsec, and cache access time is 750 psec. What is the average access time if p(hit) is 0.90?
11. If the average access time for the computer in the previous example was observed to be 900 psec, what must the probability of a hit have been?
12. The text differentiates between spatial and temporal locality (page 452). In class, I glossed over the difference. In light of the last word of both definitions in the text, discuss why my approach makes sense. Then explain what feature of cache designs applies to spatial locality but not necessarily to temporal locality, thus making the distinction meaningful after all.
13. Explain why programs tend to exhibit locality with respect to instruction accesses.
14. Explain why programs tend to exhibit locality with respect to data accesses.
15. Explain the effect of locality on the probability of a cache hit.
16. A computer with byte-addressable memory uses 48-bit addresses.
    1. How many bytes of memory could be attached to the computer?
    2. How many 8-byte words would that be?
    3. How many 128-byte blocks would that be?
    4. How many address bits would select a byte within a word?
    5. How many address bits would select a byte within a block?
    6. How many address bits would select a word within a block?
    Assume this computer has 220 cache lines.
    1. What is the capacity, in bytes, of this cache?
    2. How many sets would there be using a direct mapped design?
    3. How many sets would there be using an 8-way set associative design?
    4. How many sets would there be using a fully associative design?
    5. How many address bits would the index field have for the direct mapped design?
    6. How many address bits would the index field have for an 8-way set associative design?
    7. How many address bits would the index field have for a fully associative design?
    8. How large would the tag field be for the direct mapped design?
    9. How large would the tag field be for an 8-way set associative design?
    10. How large would the tag field be for a fully associative design?
17. What is the purpose of the v-bit in a cache memory?
18. Define cold-start, capacity, and conflict misses.