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CS-343 Assignment 6
Due April 7

Reading Assignment, Reference Material, and Resources

This assignment provides you with practice questions for the second midterm exam. There is no point in completing it after the exam, so late submissions will not be accepted. However, the deadline is midnight of the due date, so there will be a few hours in which you send the email with your answers after the exam.

The exam will cover material from sections C-7 through C-11, plus the material on the MIPS instruction set architecture (ISA) covered in class through March 31.

Questions

Put the answers to the following questions in the body of an email message (no attachments accepted). Use “CS-343 Assignment 6 submission” as the subject line. Be sure your name is in the email so you can receive credit.

  1. What is a register file?
  2. How many wires are associated with each “port” of an m×n register file or memory? (Give formula.)
  3. How many read ports and how many write ports does a MIPS register file have?
  4. How large are m and n for the full MIPS register file?
  5. How large are m and n for the register file in Assignment 5?
  6. How many wires are associated with each port of the full MIPS register file?
  7. What is special about Register 0 of the MIPS register file?
  8. What is the name of a logic circuit that has n inputs and 2n outputs, exactly one of which is true at a time?
  9. Write a sentence that describes the behavior of the same circuit as the previous question, but one that has an enable input in addition to the n inputs.
  10. How many inverters, AND gates, and OR gates would the decoder from Assignment 5 have; name the number of inputs to each gate other than the inverters. (On an exam you would draw this as a diagram, but this is an email assignment.)
  11. What are decoders used for in a register file or memory?
  12. What are the names and bit widths of all of the inputs and outputs of a register in the full MIPS register file?
  13. To what do the decoder outputs go in a MIPS register file?
  14. Where does the clock input to the register file go?
  15. Where do the data input wires to the register file go?
  16. Where does the RegWrite control signal to the register file go?
  17. Why are there two multiplexers in a MIPS register file?
  18. Where do the select inputs to the multiplexers come from?
  19. How many select inputs does each multiplexer have in an m×n register file?
  20. How many data inputs are there to each multiplexer, and where do they come from?
  21. How many outputs from each multiplexer?
  22. How many read and/or write operations does the MIPS register file perform during one clock cycle?
  23. Describe what happens during one minor cycle of the datapath. Your answer is to include a definition of the term, “minor cycle,” and it should tell what happens during the clock period and what happens at the rising edge of the clock.
  24. What are m and n for MIPS main memory?
  25. How many read and/or write operations can the MIPS main memory perform during one clock cycle?
  26. Give the names and number of bits for the inputs and outputs of the MIPS memory. Note: although the memory is byte-addressable, it reads and writes 4 bytes of data at a time.
  27. What inputs and outputs are used for a memory read operation?
  28. What inputs and outputs are used for a memory write operation?
  29. Name or give the op code mnemonic for the MIPS instruction that performs memory read operations. Describe its behavior in Verilog. This includes the expression for computing the address.
  30. Name or give the op code mnemonic for the MIPS instruction that performs memory write operations. Describe its behavior in Verilog. This includes the expression for computing the address.
  31. Use Verilog to describe the operation of the MIPS add instruction.
  32. Use Verilog to describe the operation of the MIPS beq instruction. This includes the expression for computing the branch target address.
  33. What are the three uses for MIPS I Format instructions?
  34. Use Verilog to describe the execution of the MIPS j (Jump) instruction.
  35. What is the binary value of the rightmost two bits of the PC register? Why?
  36. Use Verilog to describe the instruction fetch part of the fetch-execute cycle on the MIPS.
  37. What one field do all MIPS instruction formats have? How many bits is it, and where is it located in the instruction (give bit position numbers)?
  38. What are the three possible values that will be loaded into the PC at the beginning of each instruction cycle?