Introduction
The exam on April 8 will include all material since the first exam. Where necessary, you will need to remember material covered earlier, but the exam will not be cumulative in the sense that there will not be any explicit questions on the material tested in the first exam.
The exam will cover material from sections B.7 through B.11, Chapters 2 and 4, and sections 5.1 through 5.4 of the textbook. The emphasis will be on material actually covered in class and in the assignments.
You will be provided with a copy of panel 1 of the “MIPS Green Card” to use during the exam.
The Topics
- Sequential logic: latches, flip-flops, finite state machine design, and counter design
- Design and operation of the MIPS Register File
-
The MIPS Instruction Set Architecture
-
Memory size and addressing
- Byte and word addresses
- Instruction formats and how they are used
- Register file organization and characteristics
-
Memory size and addressing
- Formula for calculating the execution time of programs
- Comparing the performance of computers
- Using Verilog to describe the behavior of instructions
- Writing and running MIPS assembly language programs
- Pseudo-instructions
-
Relating assembly language syntactic fields to machine language bit fields
- mnemonic => op_code
- leftmost register => rs
- etc.
-
Design of the single-cycle MIPS datapath
- Structural elements: PC, Instruction Memory, Register File, ALU, Data Memory
- Which elements are clocked (and which are not); what happens on each clock edge
- Next address calculation
- What information the various fields of R-type, Jump, Branch, lw/sw, and arithmetic-instructions specify
- How the datapath is used to implement different types of instructions
- Op code decoding
- Generating control signals for the datapath (RegDst, etc)