I have uploaded a new Zip file for the optional final
  project that fixes the problem with the data memory
  part of the design. (I hope!) The project now uses a
  different FPGA clock and no longer uses the off-FPGA SRAM
  chip, so many I/O pins have been eliminated, and the pin
  assignment for the clock is different. So you need to save
  whatever work you might have done so far, delete the old
  project from your system, and start over. But if you have
  worked on the ALU, you should be able just to copy that
  back into the new project directory, add it to the new
  project, and pick up where you left off.

  I'll be updating the project description later this
  evening, and I will put up a final exam guide after the
  assignment web page is ready.

  Dr. Vickery