Course Info
Section 1T3RA, Registration Code 3182
Meets Tue & Thur 1:40 - 2:55 pm. SB B141
Schedule
| Class | Date | Notes and Assignments |
|---|---|---|
| August 30 Wed |
Classes Start | |
| 1 | August 31 Thurs |
Course Introduction. Gates. |
| September 4 Mon |
College Closed (Labor Day) | |
| 2 | September 5 Tues |
Read Appendix B of the textbook.
Combinational Logic. Introduction to Quartus. |
| September 6 Wed |
Classes follow Monday schedule | |
| 3 | September 7 Thurs |
Assignment 1 walk through. |
| 4 | September 12 Tues |
Combinational Logic |
| 5 | September 14 Thurs |
ALU Design |
| 6 | September 19 Tues |
Assignment 1
Due
Read Minimization Web Page |
| 7 | September 21 Thurs |
Sequential Logic and Finite State Machines (FSMs) |
| September 22 Fri |
No Classes (Rosh Hashanah) | |
| 8 | September 26 Tues |
FSM implementation. Edge-triggered D flip-flop design. |
| 9 | September 28 Thurs |
Assignment 2 |
| October 2 Mon |
No Classes (Yom Kippur) | |
| October 3 Tues |
Classes follow Monday Schedule | |
| 10 | October 5 Tues |
Assignment 2 Due Date
Implementing sequential designs in Quartus |
| October 9 Mon |
College Closed (Columbus Day) | |
| 11 | October 10 Tues |
Assignment 3 |
| 12 | October 12 Thurs |
Register File Design |
| 13 | October 17 Tues |
Memory Design; tristate gates MIPS R Format instructions |
| 14 | October 19 Thurs |
Review Chapter 2 and the Green Card I Format Instructions; lw and sw instructions. |
| 15 | October 24 Tues |
Midterm Exam Assignment 3 Due Date Assignment 4 |
| 16 | October 26 Thurs |
Branch instructions |
| 17 | October 31 Tues |
P/NC Drop Period Ends |
| 18 | November 2 Thurs |
Assignment 4 Due Date Read Chapter 5 MIPS Single Cycle (SC) Datapath |
| 19 | November 7 Tues |
MIPS SC Control Signals by Instruction |
| 20 | November 9 Thurs |
MIPS SC Control Unit Design Assignment 5 |
| 21 | November 14 Tues |
Performance measurement. Multi-cycle state diagram. |
| 22 | November 16 Thurs |
Multi-cycle states and control signals. |
| 23 | November 21 Tues |
Multi-cycle control unit state machine. Assignment 5 Due Date |
| November 22 Wed |
Classes follow Friday Schedule | |
| November 23 Thurs |
No Classes (Thanksgiving) | |
| 24 | November 28 Tues |
Cycle-level CPU simulation |
| 25 | November 30 Thurs |
Multi-cycle controller design. Assignment 6 Due Date |
| 26 | December 5 Tues |
Memory Hierarchy Read Chapter 7 |
| 27 | December 7 Thurs |
Cache Design. |
| 28 | December 12 Tues |
Cache Design, continued. |
| December 14 Thurs |
Reading Day Optional Extra Credit Assignment Due - Simulator Support Files |
|
| December 20 Wed |
Final Exam 1:45 - 3:45 pm Optional Assignment 7 Due Date |