Assignment 10 Solutions

The due date for this assignment is May 4. But you can get full credit if you submit it by the cutoff date of May 9.

1. Make up meaningful field names for all the pipeline registers in Fig. 6.27, tell each one's width, and how wide each register is.

     IF/ID           ID/EX           EX/MEM          MEM/WB
     32  PC+4         1  RegWrite     1  RegWrite     1  RegWrite
     32  IR           1  MemtoReg     1  MemtoReg     1  MemtoReg
                      1  Branch       1  Branch      32  ReadData
                      1  MemRead      1  MemRead     32  ALUresult
                      1  MemWrite     1  MemWrite     5  RegisterRd
                      1  ALUSrc      32  BranchTarget
                      2  ALUOp        1  Zero
                     32  PC+4        32  ALUresult
                     32  Reg[rs]     32  Reg[rt]
                     32  Reg[rt]      5  RegisterRd
                     32  SE(Imm)
                      5  rt
                      5  td
     64  Total      146  Total      107  Total       71  Total
   
   

2. Write a pseudo-code description of the logic inside the "Forwarding Unit" block in Figure 6.30. You can use if..then...else, and logical operators &&, ||, !, ==, != along with pipeline register fields using the naming convention developed in class on May 2.

     /*  Do register forwarding if necessary.  If the two previous
      *  instructions specify the same destination register and it
      *  matches either of the current instruction's source registers,
      *  get the register value from the next stage of the pipeline. 
      *  That is, the instruction immediately preceding this one.  If
      *  just one matches, use its results. If neither matches, use
      *  the contents of the register file.
      *
      *  Note: Values for ForwardA and ForwardB are taken from Figure
      *  6.31, not the values used in class.
      */
       par /*  Determine values for ForwardA and ForwardB in parallel */
       {
         if (EX.MEM.RegWrite && (EX/MEM.RegisterRd == ID/EX.Rs))
         {
           ForwardA = 0b10;
         }
         else
         {
           if (MEM/WB.RegWrite && (MEM/WB.RegisterRd == ID/EX.Rs))
           {
             ForwardA = 0b01;
           }
           else
           {
             ForwardA = 0b00;
           }
         }
         if (EX/MEM.RegWrite && (EX/MEM.RegisterRd == ID/EX.Rt))
         {
           ForwardB = 0b 10;
         }
         else
         {
           if (MEM/WB.RegWrite && (MEM/WB.RegisterRd == ID/EX.Rt))
           {
             ForwardB = 0b10;
           }
           else
           {
             ForwardB = 0b00;
           }
         }
       }
     }