CS-343 Assignment 6
Due Date and Submission
This assignment is due by midnight, May 23. Submit it
by sending email to me at the address,
vickery@babbage.cs.qc.edu. Be sure to put "CS-343 Assignment
6" in the subject of your email and to put your name/ID in the
message body.
The Assignment
The assignment is to write out the answers to Exercises 8.1,
8.2, 8.5, 8.6, 8.7, 8.8, and 8.10 on pages 342 - 344 of
the textbook. In addition, answer the questions below. Submit your
answers in the body of your email message, not as an attachment, and
not as a Word or PDF document.
Remember, you are encouraged to use the Discussion Board on the
course's Blackboard page (blackboard.qc.edu) when you are
working on this and all other assignments in this course.
Additional Questions
In addition to the questions from the textbook listed above, answer
the following questions:
- What is the clock speed of the USB busses in Figure 8-7? (Hint:
USB stands for Universal Serial Bus. That is, there is one data
bit transferred per clock pulse.)
- The USB 2.0 specification provides three bandwidth capacities,
called "high speed," "full speed," and "limited capacity low
speed." Match these bandwidths to the following transfer rates:
1.5Mb/s, 12Mb/s, and 480Mb/s. How sincerely would you congratulate
your friend who just bought a computer with a "full speed USB 2.0"
port? (Hint: The folks who developed the USB specification have
been criticized for using the term "full speed" to mean less than
the fastest speed.) And how would you answer the previous question
given the information provided in this question? That is, what is
the difference between 1.5MB/s and 1.5Mb/s?
- A high-quality digital camera stores pictures in "raw" mode,
meaning there is no compression of the data. Each pixel has 256
intensities for red, green, and blue, and a picture is taken at a
resolution of 1600x1200 pixels.
- How big is an image, in bits?
- How big is an image, in bytes?
- How long will it take to transfer an image from the camera
to a computer using each of the three USB 2.0 bandwidths?
- Here is a quotation from an
Intel web page: "The AGP3.0 Specification increased the strobe
rate from 266MT/s with AGP2.0 to 533MT/s with AGP3.0. This now
doubles the peak AGP bandwidth to 2.1 GB/s.
- Given what you know about bandwidth, what must "strobe rate"
mean, and what does the "T" in "MT/s" stand for?
- What is the data width of the AGP bus?
- Figure 8-7 shows an "AGP 2X" graphics interface. Examine the
diagram carefully and relate it to the quote above. Does the
figure in the book show an AGP2.0 system? How do you know?
- A computer has a PCI bus that operates at 66MHz and a width of
32 bits.
- What is the bandwidth of this bus?
- Two IDE disk drives are connected to this PCI bus. They
rotate at 10k rpm. Each track consists of 1024 sectors, and each
sector is 512 bytes.
- How much bandwidth is required to transfer a track of data
from one disk to memory?
- Can this PCI bus support both drives transferring tracks to
memory at full speed at the same time?
- Using the disk drives and the PCI bus from the previous
question, tell how much bandwidth and how many interrupts would be
involved in transferring one sector of data to memory using a DMA
controller, and without using a DMA controller.
- Tell whether each of the following is implemented in hardware or
in software:
- Device Driver
- Device Controller
- Operating System
- Runtime Library
- Interrupt Service Routine
- Programmable Interrupt Controller
- IRQ
- The following items list a possible sequence of events. For
each item, tell whether it is "okay" where it is in the list or
not. If it is okay, tell whether there are any other events that
must occur before it happens.
- Kernel writes control information to the PIC, telling it
what interrupt level to associate with each DC and how to assign
priorities.
- Kernel sets up interrupt vector in memory, associating
interrupt levels with interrupt service routines.
- Kernel sets the interrupt enable bit in the flags
register.
- Device driver writes control information to the device
controller telling it to request an interrupt when data is ready
for reading.
- Application program calls the runtime library to read some
data into a buffer.
- Device controller requests an interrupt because data is
available for reading.
- PIC asserts IRQ.
- CPU is betwen instructions.
- The ie bit of the flags register is true.
- CPU reads interrupt level number from the PIC.
- CPU pushes flags and program counter onto stack.
- CPU loads program counter with address of ISR and starts
executing the ISR.
- The ISR reads data from the DC.
- The ISR writes EOI to the PIC.
- The runtime library copies data from the kernel to its own
buffer.
- The runtime library copies data from its own buffer to the
application's buffer.