1. (15 points) Draw all the gates to implement each of the following sequential circuits: (a) Unclocked R-S latch, (b) Clocked D latch, and (c) Master-slave D flip-flop. Be sure to indicate which circuit is which, and to label all inputs and outputs. Note that all the gates means “all the gates!” Your diagrams are to consist entirerely of gates and wires.

2. (15 points) Construct a timing diagram that shows the difference in behavior between a D latch and a D flip-flop. You may construct any timing diagram you like, provided there are at least two clock pulses, one of which turns the two devices on, and one that turns them off. This diagram is to have four timing lines, which you should label “Clock,” “D,” “Q_latch,” and “Q_flip-flop.” That is, there is one clock signal that goes to the clock inputs of both the latch and the flip-flop, there is a second signal that goes to the D inputs of both the latch and the flip-flop, and there are to be separate signals coming from the Q outputs of the latch and of the flip-flop. To be sure you answered this right, you should mark your timing diagram to show what the difference is.

3. (20 points) Complete the state table for a 3-bit “up” counter. Hint: be sure to list the present state values in proper binary order. The counter has an external input called X that causes the counter to go to state 000 (“to reset”) when it is true. When X is zero, the counter goes to the next state in the usual way for an up counter. There is an external output, Y, which is to be true whenever the counter is in state 5, and false otherwise. Notes: Use J-K flip-flops, not D-type. Construct your state table with the following headings, where “J-K₂” means “the single value to input to both the J and K inputs of S₂ to get it to go into the proper state.”

Present State			Input	Output	Next State			Flip-Flop Inputs
S2	S1	S0	X	Y	S2	S1	S0	J-K2	J-K1	J-K0

4. (10 points) Draw a state diagram for the counter defined in Question 3. Be sure to label all states and arcs appropriately. I will assume that the output value applies to the state that an arc comes from unless you indicate otherwise.

5. (15 points) Minimize the functions for Y, J-K₂, J-K₁, and J-K₀ in your answer to Question 3, and draw a complete circuit for the counter. Use boxes for the flip-flops, but draw all other gates as gates.

6. (10 points) Give the equation for C₁ using carry-lookahead logic, and draw all the gates to implement it, including all the P_i and G_i values.

7. (15 points) Draw a diagram that shows just the leftmost position of a 32-bit parallel adder/subtracter, including the logic circuits to produce values for the C, V, and N condition code bits. Label all inputs and outputs carefully, including proper subscript values where appropriate. You may draw the full adder itself as just a box instead of drawing the gates inside it. But show all other gates for this bit position, namely the three condition code bits and the gate(s) that control adding/subtracting.