One topic covered in class but not in the textbook is minimization, but you have the web page I prepared, [ http://babbage.cs.qc.edu/courses/cs341/Minimize ] to help you study this topic. You should be able to convert a truth table into a network of gates, you should be able to convert a network of gates into a truth table, you should be able to convert a truth table into an algebraic expression, and you should be able to convert an algebraic expression into either a truth table or a logic network. You should be able to minimize expressions of 3 or 4 variables using a Karnaugh Map, and you should be able to minimize an algebraic expression. In the case of an algebraic expression you will not be responsible for finding more than one minimization. (In the language of the minimization web page, all you have to do is to compute the prime implicants.) Terms about boolean expressions that you should know include minterm, literal, and disjunctive normal form (or sum of products form).
A second topic covered in class but not in the textbook is the PAL and PROM programmable logic devices; the text covers only PLAs. For all three types of devices, you should be able to answer questions about number of inputs, number of inverters, number of AND gates, number of OR gates, number of outputs, maximum number of minterms, and total number of fuses, given the parameters describing a particular device. You should be able to draw the gates/fuses diagrams for all three types of devices, and you should be able to program any type of device to implement any truth table that will fit in the device.
A third topic covered in class but not in the textbook is the logic for producing condition code values from an ALU (Carry, oVerflow, Negative, and Zero).
The material on carry lookahead logic is not covered in the body of the text, but there was homework about it, and I went over it in class, so that material will be on the test. You should be able to give the equations for any value of Ci. You should be able to draw the gates to implment those functions, you should understand the idea behind carry lookahead logic, and you should be able to show how the adder used for carry lookahead logic differs from full and half adders.
Table 4-2 of the text book (page 206) shows how the ALU control bits can be set to achieve various computations. There are alternative settings that will accomplish the same thing. A "nice" exam question is to ask you for two different ways to perform some operaation. You had homework questions like this. You should be able to draw any or all parts of a 1-bit ALU, either as shown in Figure 3-19 or as done in class.
You should be able to define fan in, fan out, and propagation delay.
You should be able to translate among truth tables, equations, and logic networks. You should be able to implement functions of n variables using multiplexers with n-1 control inputs, you should be able to draw the gates to implement decoders, multiplexers, full adders, etc. You do not have to be able to draw the transistors used to implement a gate, but you should be familiar with the "Vickery model" of a gate and explain how that relates to fan out.
There may be more, but this seems like enough to keep you busy for a while!