1. Draw the gates to implement a multiplexor with three control (selector) inputs. Be sure to label all inputs and output(s) meaningfully.

2. Draw a diagram that shows the design of position zero in the 32-bit MIPS ALU that was developed in Chapter 4 of the text. Be sure to label all inputs and outputs meaningfully. Assume there is no carry-lookahead logic.

3. Three of the inputs in your answer to Question 2 are used to determine the operation the ALU performs. List all eight combinations of values for these three inputs, and tell what operation the ALU performs for each one.

4. Give the binary or hexadecimal values of all the inputs and outputs of the MIPS ALU when it adds -5 and +5. Give the control inputs and condition code outputs in binary. Give the operands and result in hexadecimal. Hints: (1) The second operand is 0x00000005. (2) The result is zero.

5. (A) What do the terms "carry generate" and "carry propagate" mean?
(B) Draw the gates to determine the values of carry generate and carry propagate for position i of a carry-lookahead unit.
(C) Give the formula for the C₂ output of a carry-lookahead unit.
(D) What does carry-lookahead logic accomplish compared to a ripple carry design?

6. (A) Draw the gates to implement an unclocked latch, a clocked D latch, and a D flip-flop. Label all inputs and outputs carefully.
(B) What is the difference in the behavior of a clocked D latch compared to a D flop-flop?

7. Draw bit_i of Register_j of the MIPS register file, and show how it connects to the output multiplexors of the register file. Indicate the structure of the multiplexors clearly (how many inputs, how many of them there are, etc.), but don't draw any gates.

8. (A) Explain the problem that tristate gates solve and tell how the "third state" solves it.
(B) Why are decoders often used in conjunction with tristate gates?