CS-341 Assignments, Fall 1997

Solutions will be sent to class members after assignments have been graded.
  1. HW-5 Due October 28: Exercises B.3, B.4, B.5, and B.10 from the Second Edition of the textbook. These correspond to exercises B.10, B.11, and B.12 from the First Edition, plus the following problem:
      Assume that X consists of three bits, X2 X1 X0.  Write four logic
      functions that are true if and only if
    
    • X contains only one 1
    • X contains an even number of 1s
    • X when interpreted as an unsigned binary number is less than 3
    • X when interpreted as a signed (two's complement) number is less than -1
  2. HW-4 Due October 24: Draw the gates to implement a multiplexor with two control (selector) inputs, four data inputs, and one output. The truth table is given by:
    C1
    C0
    Y
    0
    0
    D0
    0
    1
    D1
    1
    0
    D2
    1
    1
    D3

  3. HW-3 Due October 7: Convert the decimal number +123.456 to IEEE-754 single and double precision representations. Show all work, and answer in hexadecimal.

    Optional Exercise: Write a program that will accept a floating-point number from the user and which prints the binary representation of each field of the IEEE-754 encoding of the number, for both single-precision and double-precision representations. There must be no limit on the numbers the user types in other than the limits imposed by the iEEE-754 format itself.

    I will accept this as the equivalent of doing one extra homework exercise until Halloween midnight.

    
          Answers: 0x42F6E979 and 0x405EDD2F1A9FBE77.
            
          Solution: 123.456 is 7B.74BC6A7EF9DB22D... in hexadecimal. 
          [Calculator trick: instead of multiplying by 2 to get each bit,
          multiply by 16 to get each hexadecimal digit of the fraction.] 
          Move the binary point 6 places to the left, and you get:
    
          1.111011011101001011110001101010011111101111100111011011001000101101
    
          The leftmost 1 will be dropped when forming the encoded value; it's
          implicit.
    
          The single-precision exponent is 127 + 6, or 133 = 10000101 as an
          8-bit binary number, so the answer in binary is:
          
          0*100 0010 1*111 0110 1110 1001 0111 1001 (rightmost bit is
          rounded)
    
          I used '*' to separate the fields and blanks to separate the hex
          digits.
          
          The double-precision exponent is 1023 + 6 or 1029 = 10000000101 as
          an 11-bit binary number, and the answer in binary is:
          
          0*100 0000 0101*1110 1101 1101 0010 1111
           0001 1010 1001 1111 1011 1110 0111 0111
    
          Again, the rightmost binary digit has been rounded up.
    
    
  4. HW-2 Due September 26
  5. HW-1 Due September 16
      Note:  Because of problems getting the textbook, I am giving
      the textbook exercises here:
    
      2.10  We are interested in two implementations of a machine, one with
      and one without special floating-point hardware.
      
      Consider a program, P, with the following mix of operations:
      
        floating-point multiply 10%
        floating-point add      15%
        floating-point divide    5%
        Integer instructions    70%
        
      Machine MFP (Machine with Floating Point) has floating-point hardware
      and can therefore implement the floating-point operations directly. 
      It requires the following number of clock cycles for each instruction
      class:
    
        floating-point multiply  6
        floating-point add       4
        floating-point divide   20
        Integer instructions     2
        
      Machine MNFP (Machine with N Floating Point) has no floating-point
      hardware and so must emulate the floating-point operations using
      integer instructions.  The integer instructions all take 2 clock
      cycles.  The number of integer instructions needed to implement each
      of the floating-point operations is as follows:
      
        floating-point multiply 30
        floating-point add      20
        floating-point divide   50
        
      Both machines have a clock rate of 100 MHz.  Find the native MIPS
      ratings for both machines.
        
      2.11  If the machine MFP in Exercise 2.10 needs 300,000,000
      instructions for this program, how many integer instructions does the
      machine MNFP require for the same program?
      
      2.12  Assuming the instruction counts from Exercise 2.11, what is the
      execution time (in seconds) for the program in Exercise 2.10 run on
      MFP and MNFP?
      
      2.13  Assuming that each floating-point operation counts as 1, and
      that MFP executes 300,000,000 instructions, find the MFLOPS rating for
      both machines in Exercise 2.10
    
    

Dr. Christopher Vickery
Computer Science Department
Queens College of CUNY