1. Add the following pairs of 12-bit two's complement integers. Give the decimal equivalent of each operand and each answer. For each sum, tell the value of the carry out from the leftmost bit and the value of the overflow output. The first row is done for you.

2.

1. Define the terms carry generate and carry propagate in words, and give the logic equations to compute them.
2. Compare the speeds of parallel adders with and without carry lookahead logic numerically.

3. Draw the gates to implement a multiplexor with eight data inputs. Label all inputs and output(s) meaningfully.

4. Draw the gates to implement a 2x4 decoder. Label all inputs and outputs meaningfully.

5. Convert the decimal number -123.750 into IEEE-754 format.

6.

1. Draw the gates to implement a clocked D latch. Label all inputs and outputs.
2. Draw a timing diagram with three clock pulses for this latch. Construct it so the first pulse turns the latch off, the second pulse leaves the latch off, and the third pulse turns the latch on. Show the timing relationships between the clock edges and the output changes carefully.

7.

1. Draw a diagram that shows how to construct a master-slave flip-flop using clocked D latches.
2. Use a timing diagram to illustrate the difference between a clocked D latch and a D flip-flop. Have three clock pulses; the first turns the latch or flip-flop on, the second turns it off, and the third turns it on again. Put the Q output of the latch and the Q output of the flip-flop on the same timing diagram. Label which is which.

8. Draw a single box to represent a 16Mx2 SRAM IC. Label all inputs and outputs, and indicate the number of wires for the address, data in, and data out connections.

9. Use 16Mx2 SRAM ICs to build a 32 megabyte memory system. Label all inputs and outputs, and indicate how many wires go to each place.